The DDR5/LPDDR5/5X memory controller is a high-efficiency, low-latency integrated memory controller for various applications.
The controller operates at half the DRAM clock frequency and supports DDR5, LPDDR5, and LPDDR5X standards up to 8,533 Mb/s. The controller can be configured as a single DDR memory interface with data widths up to 32 bits. Dual channel configurations are also supported at data widths up to 16 bits. The controller supports both sideband and in-line error correction code (ECC) configurations. The controller supports DDR5 and LPDDR5/5X components, and DDR5 dual in-line memory modules (DIMMs). The memory controller includes optional AES-GCM or AES-XTS encryption. A built-in side channel leakage reduction feature is available when using AES-GCM encryption to provide resistance to dynamic power analysis (DPA) or side channel analysis (SCA).
For more information on the memory controller, see the Integrated DDR5/LPDDR5/5X Memory Controller LogiCORE IP Product Guide (PG456).