The Versal adaptive SoC enhances its CLBs compared to previous architectures. Versal adaptive SoC does not support some CLB resources. Examples include CARRY8, MUXF7, MUXF8, MUXF9, and so on. Inferring the appropriate Versal adaptive SoC block automatically migrates them. RTL instantiations also migrate automatically.
For optimal area and timing results, AMD recommends:
- Do not instantiate CLB UniSims that the Versal adaptive SoC no longer supports
- Re-synthesize RTL to infer the appropriate Versal adaptive SoC block
For detailed architectural differences, refer to the Versal Adaptive SoC Configurable Logic Block Architecture Manual (AM005).