SCD Design Pipeline - 2023.1 English

Zynq UltraScale+ MPSoC ZCU106 Video Codec Unit Targeted Reference Design User Guide (UG1250)

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2023.1 English

The SCD design pipeline is shown in This Figure .

Figure 5-11: SCD Pipeline

X-Ref Target - Figure 5-11


Video Scene Change is used with the Zynq UltraScale+ VCU subsystem to identify when to update the reference frame for better performance while encoding streams. This is done using the Video Scene Change detection IP interrupt flag. It sends fewer frames that help in reducing the compressed stream size thereby saves bandwidth.

The Video Scene Change detection on the IP core can read up to eight video streams in memory mode and one video stream in stream mode. In memory mode, input is read from the memory mapped AXI4 interface. In stream mode, input is read from the AXI4-Stream interface and output stream is same as received input stream. For more information refer to the Video Scene Change Detection LogiCORE IP Product Guide (PG322) [Ref 22] .