The HDMI audio RX pipeline is shown in This Figure .
This pipeline consists of two components, each of them controlled by the APU through an AXI4-Lite base register interface:
• The Video PHY Controller is shared with the HDMI RX and HDMI TX pipelines. Refer to HDMI RX Capture Pipeline for more information on the VPHY and its configuration.
• The HDMI RX Subsystem is shared with the HDMI RX pipeline. Refer to HDMI RX Capture Pipeline for more information on the VPHY and its configuration.
• The Audio Formatter provides high-bandwidth direct memory access between memory and AXI4-Stream target peripherals. Initialization, status, and management registers are accessed through an AXI4-Lite slave interface. It is configured with both read and write interface enabled for a maximum of two audio channels and interleaved memory packing mode with memory data format configured as AES to PCM.
Note: The Audio Engineering Society (AES) standard was developed for the exchange of digital audio signals between professional audio devices.