The Vitis tool uses JTAG to control the board, and performed the following tasks:
Used FSBL to initialize the MPSoC.
Reset the system.
Enabled the RPU in split mode.
Downloaded the ELF file to Cortex-A53_0 and Cortex-R5F_0. Put processors in suspend mode.
Ran applications on both processors.
The application on APU printed on UART-0 and the application on RPU printed on UART-1.
You can view the detailed steps by right-clicking hello_system, selecting Run As → Run Configurations, and viewing the Target Setup tab.
Fig. 10 Vitis Run Configurations