Right-click hello_r5 and select Run as → Run Configurations.
Right-click Xilinx Application Debugger and click New Configuration.
The Vitis IDE creates the new run configuration, named Debugger_hello_r5-Default. The configurations associated with the application are pre-populated in the Main page of the launch configurations.
Click the Target Setup page and review the settings.
This file is exported when you create the platform using the Vitis IDE; it contains the initialization information for the processing system.
Click Run.
“Hello World” appears on the serial communication utility in Terminal 1, as shown in the following figure.
Because the “Hello World” applications for Cortex-A53 and Cortex-R5F are identical, they cannot be differentiated based on the print contents, but you can view the details in the Debug Perspective.
If you view the XSCT console, it shows the XSCT command history as shown in the following example:
Downloading Program -- C:/edt/edt_zcu102_workspace/hello_r5/Debug/hello_r5.elf section, .vectors: 0x00000000 - 0x00000637 section, .text: 0x00100000 - 0x00101947 section, .init: 0x00101948 - 0x00101953 section, .fini: 0x00101954 - 0x0010195f section, .note.gnu.build-id: 0x00101960 - 0x00101983 section, .rodata: 0x00101988 - 0x00101f3c section, .data: 0x00101f40 - 0x001023af section, .bootdata: 0x001023b0 - 0x0010252f section, .eh_frame: 0x00102530 - 0x00102533 section, .ARM.exidx: 0x00102534 - 0x0010253b section, .init_array: 0x0010253c - 0x0010253f section, .fini_array: 0x00102540 - 0x00102543 section, .bss: 0x00102544 - 0x0010256b section, .heap: 0x0010256c - 0x0010456f section, .stack: 0x00104570 - 0x00107d6f 0% 0MB 0.0MB/s ??:?? ETA 100% 0MB 0.2MB/s 00:00 Setting PC to Program Start Address 0x0000003c Successfully downloaded C:/edt/edt_zcu102_workspace/hello_r5/Debug/hello_r5.elf
More debugging techniques are explored in the next chapter.
Note
No bitstream download is required for the above software application to be executed on the Zynq UltraScale+ evaluation board. The Arm Cortex-R5F dual core is already present on the board. Basic initialization of this system to run a simple application is accomplished by the FSBL application.