Reviewing FSBL in the Platform - 2024.2 English - UG1209

Zynq UltraScale+ MPSoC Embedded Design Tutorial (UG1209)

Document ID
UG1209
Release Date
2025-01-07
Version
2024.2 English

To review the FSBL in the platform, follow these steps:

  1. In the Explorer view, navigate to zynqmp_fsbl by expanding the zcu102_edt platform to see the FSBL source code. You can edit this source for customizations. Build the platform after code modification.

  2. The platform-generated FSBL is involved in PS initialization while launching standalone applications using JTAG.

  3. This FSBL is created for the psu_cortexa53_0, but you can also re-target the FSBL to psu_cortexr5_0 using the re-target to psu_cortexr5_0 option in the zynqmp_fsbl domain settings.

  4. The zynqmp_fsbl domain is created automatically if bootloader creation is enabled during platform creation.