Modifying the Board Support Package for testapp_r5 - 2024.2 English - UG1209

Zynq UltraScale+ MPSoC Embedded Design Tutorial (UG1209)

Document ID
UG1209
Release Date
2025-03-20
Version
2024.2 English

The ZCU102 Evaluation kit has a USB-TO-QUAD-UART Bridge IC from Silicon Labs (CP2108). This enables you to select a different UART port for applications running on Cortex-A53 and Cortex-R5F cores. For this example, let Cortex-A53 use the UART 0 by default, and send and receive RPU serial data over UART 1. This requires a small modification in the standalone_r5 bsp configuration.

  1. Open the platform details tab by clicking vitis-comp.json under zcu102_edt.

  2. Open the standalone domain BSP setting details for Cortex-R5F:

    1. Navigate to psu_cortexr5_0 → standalone_r5 → Board Support Package → standalone.

  3. Change the UART settings for standalone_r5:

    1. Change standalone_stdin to psu_uart_1.

    2. Change standalone_stdout to psu_uart_1

      _images/image37.png
    1. Click OK.

  4. Build the zcu102 platform and the testapp_r5 application.

  5. Verify that the application is compiled and linked successfully and that the testapp_r5.elf has been generated in the testapp_r5/build folder.