Exporting the Post-Implementation Hardware Platform - 2024.2 English - UG1209

Zynq UltraScale+ MPSoC Embedded Design Tutorial (UG1209)

Document ID
UG1209
Release Date
2025-03-20
Version
2024.2 English

We will run implementation of the Vivado design and export the post-implementation design. The Vivado generated bitstream will be included in the XSA file. It can make the software tests and boot image generation steps easier in the Vitis IDE. Note that the Vitis IDE also accepts pre-synthesis XSAs for application development. Bitstream is only required for debugging PL designs.

  1. Validate the block diagram design:

    1. Return to the block diagram view.

    2. Save the block design (press Ctrl+S).

    3. Click the Validate Design button on the block diagram toolbar. Alternatively, press the F6 key.

      It takes a while to validate the design. A message dialog box pops up and states “Validation successful. There are no errors or critical warnings in this design.” If it reports any errors or critical warnings, review the previous steps and correct the errors.

    4. Click OK to close the message.

  2. Generate output products:

    1. Click Generate Block Design in the Flow Navigator panel.

    2. Click Generate.

    3. When the Generate Output Products process completes, click OK.

    4. In the Block Diagram Sources window, click the IP Sources tab. Here you can see the output products that you just generated, as shown in the following figure.

      _images/image106.png
  3. Make sure you have an HDL top file. Because this design is saved from the introduction design, we have already done it.

  4. Run synthesis, implementation, and bitstream generation:

    1. Click Generate Bitstream.

    2. Vivado displays a popup message saying “There are no implementation results available. OK to launch synthesis and implementation?”. Click Yes.

    3. Review the Launch Runs dialogue, set the proper number of jobs to run simultaneously, and click OK.

    4. Wait for Vivado to complete implementation. After it finishes, a Bitstream Generation Completed message will pop up. Click Cancel to close it.

      Vivado Launch Run Configuration

      Fig. 20 Vivado Launch Run Configuration

  5. Export the hardware design:

    1. Select File → Export → Export Hardware. The Export Hardware Platform window opens.

    2. Click Next.

    3. Select Include Bitstream and click Next.

    4. Specify the XSA file name and path. This is kept at default in this example. Click Next.

    5. Review the summary and click Finish to close the window.

    6. The hardware platform XSA file is generated in the specified path.