Launch Vitis and use a new workspace:
\edt\design\example1\for this project.In the Vitis IDE, select File → New Component → Platform. The New Project wizard opens.
Screen
System Properties
Settings
Platform
Create a New Platform from Hardware
edt_zcu102_wrapper.xsa
Platform Name
zcu102
Generate Boot Artifacts
uncheck
Operating System
Standalone
Target processor
psu_cortexr5_0
Select the Build button under the flow tab to build the zcu102 platform.
In the Vitis IDE, select File → New Component → Application. The Create Application Component - Empty Application wizard opens.
Use the information in the table below to make your selections in the wizard.
Screen
System Properties
Settings
Application Project Details
Application project name
tmr_psled_r5
Domain
Domain
standalone_psu_cortexr5_0
Click Finish.
The New Project wizard closes and the Vitis IDE creates the tmr_psled_r5 application project, which you can view in the Project Explorer.
In the Vitis IDE, select File → New Component → System Project. The Create System Project wizard opens.
Use the information in the table below to make your selections in the wizard.
Screen
System Properties
Settings
System Project Details
System project name
tmr_psled_r5_system
Platform
zcu102
Select the ‘vitis-sys.json’ file under settings within tmr_psled_r5_system in the Explorer view and click Add Existing Component.
Select Application and then select ‘tmr_psled_r5’. Now the tmr_psled_r5 application resides inside the tmr_psled_r5_system component.
In the Explorer view, expand the tmr_psled_r5.
Right-click the src folder within Sources inside tmr_psled_r5 and select Import → Files to open the Import view.
Navigate to the design files folder (ref_files/design1)
Select the timer_psled_r5.c file.
Click Open.
Build the tmr_psled_r5_system