Create First Stage Boot Loader for USB Boot - 2025.1 English - UG1209

Zynq UltraScale+ MPSoC Embedded Design Tutorial (UG1209)

Document ID
UG1209
Release Date
2025-07-30
Version
2025.1 English
  1. In the Vitis IDE, select File → New Example → Zynq MP FSBL to open the New Project wizard.

  2. Use the information in the table below to make your selections in the wizard.

    Screen

    System Properties

    Settings

    Platform

    Select platform from repository

    edt_zcu102_wrapper

    Application project details

    Application project name

    fsbl_usb_boot

    Domain

    Domain

    standalone on psu_cortexa53_0

  3. Select File → New Component → System Project. The Create System Project wizard opens.

  4. Use the information in the table below to make your selections in the wizard screens.

    Screen

    System Properties

    Settings

    Platform

    Select platform from repository

    zcu102_edt

    System project details

    System Project Name

    fsbl_usb_boot_system

  5. Select the ‘vitis-sys.json’ file under settings within fsbl_usb_boot_system in the Explorer view and click Add Existing Component.

  6. Select Application and then select ‘fsbl_usb_boot’. Now the fsbl_usb_boot application resides inside the fsbl_usb_boot_system component.

  7. In the Explorer view, expand the fsbl_usb_boot project and open xfsbl_config.h from fsbl_usb_boot→ src→xfsbl_config.h.

  8. In xfsbl_config.h change or set following settings:

    #define FSBL_QSPI_EXCLUDE_VAL (1U)
    #define FSBL_SD_EXCLUDE_VAL (1U)
    #define FSBL_USB_EXCLUDE_VAL (0U)
    
  9. Press Ctrl+S to save these changes.

  10. Build FSBL (fsbl_usb_boot).