Create First Stage Boot Loader for USB Boot - 2024.2 English - UG1209

Zynq UltraScale+ MPSoC Embedded Design Tutorial (UG1209)
Document ID
UG1209
Release Date
2025-01-07
Version
2024.2 English

  1. In the Vitis IDE, select File → New → Application Project to open the New Project wizard.

  2. Use the information in the table below to make your selections in the wizard.

    Screen

    System Properties

    Settings

    Platform

    Select platform from repository

    edt_zcu102_wrapper

    Application project details

    Application project name

    fsbl_usb_boot

    System project name

    fsbl_usb_boot_system

    Target processor

    psu_cortexa53_0

    Domain

    Domain

    standalone on psu_cortexa53_0

    Templates

    Available templates

    Zynq MP FSBL

  3. Click Finish.

  4. In the Explorer view, expand the fsbl_usb_boot project and open xfsbl_config.h from fsbl_usb_boot→ src→xfsbl_config.h.

  5. In xfsbl_config.h change or set following settings:

    #define FSBL_QSPI_EXCLUDE_VAL (1U)
#define FSBL_SD_EXCLUDE_VAL (1U)
#define FSBL_USB_EXCLUDE_VAL (0U)

  6. Press Ctrl+S to save these changes.

  7. Build FSBL (fsbl_usb_boot).