Building Software for PS Subsystems - 2024.2 English - UG1209

Zynq UltraScale+ MPSoC Embedded Design Tutorial (UG1209)

Document ID
UG1209
Release Date
2025-03-20
Version
2024.2 English

This chapter lists the steps to configure and build software for PS subsystems.

In the previous chapter, you created and exported the hardware design from Vivado. The exported XSA file contains the hardware handoff, the processing system initialization (psu_init), and the PL bitstream (if the hardware is exported as post-implementation). In this chapter, you will import the XSA into the Vitis™ IDE to generate software for the processing system.

You will use the Vitis IDE to perform the following tasks:

  1. Create a platform project for the hardware XSA. The first stage boot loader (FSBL) and PMU firmware for the PMU (platform management unit) will be created as boot components in this platform project.

  2. Create bare-metal applications for the application processing unit (APU).

  3. Create a system project for the APU and real time processing unit (RPU).