If the Vitis IDE is not already running, start it and set the workspace as indicated in Build Software for PS Subsystems.
Select Vitis → Create Boot Image.
Select Zynq Ultrascale+ as the Architecture.
Select the Create new BIF file option.
Ensure that the Output format is set to BIN.
In the Basic page, browse to and select the Output BIF file path and output path.
Next, add boot partitions using the following steps:
Click the + button to open the Add Partition view.
In the Add Partition view, click the Browse button to select the FSBL executable.
For FSBL, ensure that the Partition type is selected as boot loader and the correct destination CPU is selected by the tool. The tool is configured to make this selection based on the FSBL executable.
Ignore the Exception Level, as FSBL is set to EL3 by default. Also, leave the TrustZone setting unselected for this example.
Click OK to select the FSBL and go back to the Create Boot Image wizard.
Click the + button to open the Add Partition window to add the next partition.
The next partition is the PMU firmware for the Platform Management Unit.
Select the Partition type as datafile and the Destination Device as PS.
Select PMU for Destination CPU.
Click OK.
The next partition to be added is the TF-A firmware. For this, set the Partition type to datafile.
The TF-A executable bl31.elf can be found in the PetaLinux images folder
<PetaLinux_project\/images/linux/
.Select the Destination Device as PS and the Destination CPU as A53 0.
Set the Exception Level to EL3 and select Enable TrustZone.
Click OK.
Click the + button to add the R5 bare-metal executable.
Add the R5 executable and enable it in lockstep mode, as shown in the following image.
Click OK.
Click the + button to add the U-Boot partition. u-boot.elf can be found in
<PetaLinux_Project>/images/linux/
.For U-Boot, make the following selections:
Set the Partition Type to datafile.
Set the Destination Device to PS.
Set the Destination CPU to A53 0.
Set the Exception Level to EL2.
Click OK.
Click the + button to add the image.ub Linux image file.
The image.ub image file can be found in PetaLinux project in the
images/Linux
directory.For image.ub, make the following selections:
Set Partition Type to datafile.
Set the Destination Device to PS.
Set the Destination CPU to A53 0.
Enter
0xF00000
as the offset.Leave Exception Level and TrustZone unselected.
Click the + button to add the
boot.scr
script file.The
boot.scr
file is located in theimages/linux
directory of the PetaLinux project.For
boot.scr
, select the following:Set the partition type to datafile.
Set the Destination Device to PS.
Set the Destination CPU to A53 0.
Enter 0x3e80000 as the offset.
Leave Exception Level and TrustZone unselected.
Click Create Image to create the
qspi_BOOT.bin
image.You can also create qspi_BOOT.bin images using the BIF attributes and the Bootgen command. You can view the BIF attributes for this configuration by clicking Preview BIF Changes. For this configuration, the BIF file contains the following attributes:
//arch = zynqmp; split = false; format = BIN the_ROM_image: { [bootloader, destination_cpu = a53-0]C:\edt\fsbl_a53\Debug\fsbl_a53.elf [destination_cpu = pmu]C:\edt\edt_zcu102_wrapper\export\edt_zcu102_wrapper\sw\edt_zcu102_wrapper\boot\pmufw.elf [destination_cpu = a53-0, exception_level = el-3, trustzone]C:\edt\qspi_boot\bl31.elf [destination_cpu = r5-lockstep]C:\edt\testapp_r5\Debug\testapp_r5.elf [destination_cpu = a53-0, exception_level = el-2]C:\edt\qspi_boot\u-boot.elf [offset = 0xF00000, destination_cpu = a53-0]C:\edt\qspi_boot\image.ub [offset = 0x3e80000, destination_cpu = a53-0]C:\edt\qspi_boot\boot.scr }
The Vitis IDE calls the following Bootgen command to generate the qspi_BOOT.bin image for this configuration.
bootgen -image qspi_boot.bif -arch zynqmp -o C:\edt\qspi_BOOT.bin``
Note
In this boot sequence, the First Stage Boot Loader (FSBL) loads PMU firmware. This is because the PMU firmware was added as a datafile partition type. Ideally, the boot ROM code can load the PMU firmware for PMU as seen in the earlier section. For more details on PMU firmware, refer to the “Platform Management” chapter in the Zynq UltraScale+ MPSoC: Software Developers Guide (UG1137).