Enable the following kernel configurations in the Linux kernel
(.config).
- Enable remote processor and RPMsg core support
-
CONFIG_REMOTEPROC=y -
CONFIG_XLNX_R5_REMOTEPROC=y -
CONFIG_RPMSG=y -
CONFIG_RPMSG_CHAR=m -
CONFIG_RPMSG_CTRL=m -
CONFIG_RPMSG_NS=y -
CONFIG_RPMSG_TTY=y -
CONFIG_RPMSG_VIRTIO=y
-
- Enable virtio support
-
CONFIG_VIRTIO=y -
CONFIG_VIRTIO_MMIO=y -
CONFIG_VIRTIO_MENU=y
-
- Enable mailbox and IPI support
-
CONFIG_MAILBOX=y -
CONFIG_ZYNQMP_IPI_MBOX=y
-
Linux Device Tree Requirements
Use the following device tree reference:
- GitHub repository: meta-amd-adaptive-socs
- File: meta-amd-adaptive-socs-bsp/conf/dts/versal-2ve-2vm-vek385-sdt-seg/cortexa78-linux.dts
- Define reserved memory regions for OpenAMP
communication:
reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; /* Resource table - Contains vring and carveout descriptors */ rsctbl@9800000 { phandle = <0x26a>; no-map; reg = <0x0 0x9800000 0x0 0x100>; /* 256 bytes */ }; /* RPU firmware DDR region (ELF loader boot) */ ddrboot@9800100 { phandle = <0x269>; device_type = "memory"; no-map; reg = <0x0 0x9800100 0x0 0x5ff00>; /* ~383 KB */ }; /* VirtIO vring0 - APU to RPU */ vdev0vring0@9860000 { phandle = <0x266>; no-map; reg = <0x0 0x9860000 0x0 0x4000>; /* 16 KB */ }; /* VirtIO vring1 - RPU to APU */ vdev0vring1@9864000 { phandle = <0x267>; no-map; reg = <0x0 0x9864000 0x0 0x4000>; /* 16 KB */ }; /* VirtIO shared buffer pool */ vdev0buffer@9868000 { phandle = <0x268>; no-map; reg = <0x0 0x9868000 0x0 0x40000>; /* 256 KB */ compatible = "shared-dma-pool"; }; };Table 1. Memory Map Summary Region Base Address Size Purpose Resource Table 0x09800000 256 B OpenAMP resource descriptors RPU Firmware (DDR) 0x09800100 383 KB Zephyr ELF load region VRing0 (TX) 0x09860000 16 KB APU-to-RPU message ring VRing1 (RX) 0x09864000 16 KB RPU-to-APU message ring Shared Buffers 0x09868000 256 KB RPMsg buffer pool - Configure the IPI mailbox infrastructure for APU-to-RPU
communication:
ipi0: mailbox@eb330000 { compatible = "xlnx,versal-ipi-mailbox"; interrupt-parent = <&gic>; interrupts = <0x0 0x39 0x4>; reg = <0x0 0xeb330000 0x0 0x10000>, /* Control registers */ <0x0 0xeb3f0400 0x0 0x200>; /* Message buffer */ xlnx,ipi-id = <0x2>; /* APU IPI ID */ #address-cells = <0x2>; #size-cells = <0x2>; ranges; reg-names = "ctrl", "msg"; /* APU to RPU IPI channel (no-buffer variant for interrupts) */ ipi_1_nobuf_to_ipi_2_nobuf: child@eb3b1000 { compatible = "xlnx,versal-ipi-dest-mailbox"; #mbox-cells = <0x1>; xlnx,ipi-id = <0xb>; /* No-buffer IPI ID */ reg = <0x0 0xeb3b1000 0x0 0x1000>; reg-names = "ctrl"; }; }; - Define the remote processor (remoteproc) node for r52
management:
remoteproc@eba00000 { compatible = "xlnx,versal-net-r52fss"; #address-cells = <0x2>; #size-cells = <0x2>; xlnx,cluster-mode = <0x0>; /* Split mode - individual cores */ ranges = <0x0 0x0 0x0 0xeba00000 0x0 0x10000 /* ATCM */ 0x0 0x10000 0x0 0xeba10000 0x0 0x8000 /* BTCM */ 0x0 0x18000 0x0 0xeba20000 0x0 0x8000>; /* CTCM */ r52f@0 { compatible = "xlnx,versal2-r52f"; power-domains = <&versal2_firmware 0x181100bf>, <&versal2_firmware 0x183180cb>, /* ATCM */ <&versal2_firmware 0x183180cc>, /* BTCM */ <&versal2_firmware 0x183180cd>; /* CTCM */ reg = <0x0 0x0 0x0 0x10000 /* ATCM global view */ 0x0 0x10000 0x0 0x8000 /* BTCM global view */ 0x0 0x18000 0x0 0x8000>; /* CTCM global view */ reg-names = "r52_0a_atcm_global@eba00000", "r52_0a_btcm_global@eba10000", "r52_0a_ctcm_global@eba20000"; /* Link to reserved memory regions */ memory-region = <&rsctbl9800000>, /* Resource table */ <&vdev0buffer>, /* Shared buffer */ <&vdev0vring0>, /* TX vring */ <&vdev0vring1>, /* RX vring */ <&ddrboot>; /* Firmware region */ /* IPI mailbox for notifications */ mboxes = <&ipi_1_nobuf_to_ipi_2_nobuf 0x0>, /* TX */ <&ipi_1_nobuf_to_ipi_2_nobuf 0x1>; /* RX */ mbox-names = "tx", "rx"; }; }; - Review the key points:
-
xlnx,cluster-mode = <0>sets split mode. The r52 cores operate independently. -
power-domainsdefines the EEMI power domain IDs for the r52 core and tightly coupled memories (TCMs). -
memory-regionlinks to the reserved memory phandles that you defined earlier. -
mboxesdefines bidirectional IPI channels for interrupt signaling. - The TCM regions map at these global addresses in the APU view:
- ATCM at
0xeba00000 - BTCM at
0xeba10000 - CTCM at
0xeba20000
- ATCM at
-