Configuring the Zynq 7000 Processing System with Presets in Vivado - 2023.2 English

Zynq-7000 SoC Embedded Design Tutorial (UG1165)

Document ID
UG1165
Release Date
2024-05-02
Version
2023.2 English

In the Block Diagram window, notice the message stating that Designer assistance is available, as shown in the following figure.

../_images/image13.png
  1. Click the Run Block Automation link. The Run Block Automation view opens.

    Note that Cross Trigger In and Cross Trigger Out are disabled. For a detailed tutorial with information about cross trigger set-up, refer to the Vivado Design Suite Tutorial: Embedded Processor Hardware Design (UG940).

  2. Click OK to accept the default processor system options and make default pin connections.

    The following image illustrates the automation result. It configures PS properties inside the block and connects fixed IO and DDR pins.

    ../_images/vivado_zynq_automation_result.png