Assigning Location Constraints to External Pins - 2023.2 English

Zynq-7000 SoC Embedded Design Tutorial (UG1165)

Document ID
UG1165
Release Date
2024-05-02
Version
2023.2 English
  1. Click Open Elaborated Design under RTL Analysis in the Flow Navigator view.

    Open Elaborated Design

    Open Elaborated Design

    • Click OK on the pop-up message.

      Tip

      The design might take a few minutes to elaborate. If you want to do something else in Vivado while the design elaborates, you can click the Background button to have Vivado continue running the process in the background.

  2. Select I/O Planning from the dropdown menu, as shown in the following figure, to display the I/O Ports window.

    IO Planning Drop Down menu

    IO Planning Drop Down menu

  3. Under the I/O Ports window at the bottom of the Vivado window (as seen in the following figure), expand the GPIO_0_0_ and gpio_sw_ ports to check the site (pin) map.

    ../_images/image47.png
  4. Find GPIO_0_0_tri_io[0] and set the following properties, shown in the following figure:

    • Package Pin = F19

    • I/O Std = LVCMOS25

  5. Find gpio_sw_tri_io[0] and set the following properties, shown in the following figure:

    • Package Pin = G19

    • I/O Std = LVCMOS25

    Pin Assigned

    Pin Assigned

    Note

    For additional information about creating other design constraints, refer to the Vivado Design Suite User Guide: Using Constraints (UG903).

  6. In the Flow Navigator, under Program and Debug, select Generate Bitstream.

    1. The Save Constraints window opens.

    2. Input a file name, such as constraints.

    3. Keep File Type = XDC and File Location = ****.

    4. Click OK.

    5. Click OK to launch synthesis, implementation first.

    6. In the Launch Runs window, keep launch runs on the local host and click OK.

      A constraints file is created and saved under the Constraints folder on the Hierarchy view of the Sources window.

      ../_images/image50.png
    7. After bitstream generation completes, click cancel in the pop-up window.

  7. Export the hardware using File→ Export → Export Hardware. Use the information in the table below to make selections in each of the wizard screens. Click Next where necessary.

    Screen

    System Property

    Setting or Command to Use

    Export Hardware Platform

    Output

    Select Include bitstream.

    Files

    XSA Filename

    Leave as system_wrapper.

    Export to

    Leave as C:/edt/edt_zc702.

    Note

    If a pop-up appears saying the module is already exported, click Yes to overwrite the file.

    • Click Finish.

    The exported file is located at C:/edt/edt_zc702/system_wrapper.xsa.