The PS-only reset re-boots the PS while that PL remains active. You can trigger the PS-only reset by hardware error signal(s) or a software register write. If the PS-only reset is due to an error signal, then the error can be indicated to the PL also, so that the PL can prepare for the PR restart.
The PS-only reset sequence can be implemented as follows:
- [ErrorLogic] Error interrupt is asserted whose action requires PS-only reset. This request is sent to PMU as an interrupt.
- [PMU-FW] Set PMU Error (=>PS-only reset) to indicate to PL.
See the PS Only Reset section in the “Reset System” chapter of the Zynq UltraScale+ Device Technical Reference Manual (UG1085) describes the PS-only reset sequence.
PS-only Restart on WDT Timeout Error
Enable all the flags listed in the Wiki Zynq UltraScale+ MPSoC Restart solution, compile the necessary components, and boot the system. After waiting for the 60-second, if the WDT is not kicked, it will get expired and triggers a PS-only restart to recover the system.