Device Tree Generator - 2025.2 English - UG1137

Zynq UltraScale+ MPSoC Software Developer Guide (UG1137)

Document ID
UG1137
Release Date
2025-12-03
Version
2025.2 English

The system device tree generator (SHEL flow) replaced the device tree generator (DTG) device tree in the PetaLinux toolset. The embedded development framework (EDF) uses the SHEL flow.

The device tree (DT) data structure consists of nodes with properties that describe a hardware. The Linux kernel uses the device tree to support a wide range of hardware configurations.

In FPGAs, it is possible to have different combinations of peripheral logics, each using a different configuration. For all the different combinations, the DTG generates the .dts/.dtsi device tree files.

The following is a list of the .dts/.dtsi files generated by the device tree generator:

  • pl.dtsi: Contains all the memory mapped peripheral logic (PL) IPs.
  • pcw.dtsi: Contains the dynamic properties for the PS IPs.
  • system-top.dts: Contains the memory, boot arguments, and command line parameters.
  • zynqmp.dtsi: Contains all the PS specific and the CPU information.
  • zynqmp-clk-ccf.dtsi: Contains all the clock information for the PS peripheral IPs.

For more information, see the Build Device Tree Blob page on the AMD Wiki.