Understanding How Rights Affect Vivado Tools - Understanding How Rights Affect Vivado Tools - 2026.1 English

Understanding How Rights Affect Vivado Tools - Understanding How Rights Affect Vivado Tools - 2026.1 English - UG1118

Vivado Design Suite User Guide: Creating and Packaging Custom IP (UG1118)

Document ID

UG1118

Release Date

2026-07-23

Version

2026.1 English

The following table shows how different rights affect the various Vivado tools. It includes both common rights and AMD-specific rights.

Table 1. How Rights Affect Vivado Tool Activities
Right/Type	Simulation	Synthesis Vivado Synthesis	Implementation Vivado Implementation/Timing/Viewers
error_handling/common	delegated = Hide error message references inside encrypted areas.	delegated = Hide error message references inside encrypted areas.	Not Applicable (NA)¹
runtime_visibility/common	delegated = Follow current Vivado simulator behavior- hiding visibility in hierarchy viewer, and so forth.	delegated =Follow current Vivado default behavior- hiding visibility.	delegated =All names/hierarchy visible
child_visibility/common	delegated = No change to current Vivado simulator behavior (equivalent to Denied - hidden) allowed = Show hierarchy, error messages for child levels.	delegated = No change to current behavior (equivalent to Denied - hidden) allowed =Show names/message for child levels.	delegated = allowed = No change to current behavior of Vivado implementation.
decryption/common	delegated/true = Read in decrypted file. false = Do not read in decrypted file - issue message and stop processing.	delegated/true = Read in decrypted file. false = Do not read in decrypted file - issue message and stop processing.	delegated/true = Read in decrypted file false = Do not read in decrypted file - issue message and stop processing
xilinx_enable_netlist_export/ xilinx-specific	N/A	true = write_vhdl and write_verilog output netlists false = write_vhdl and write_verilog do not run	true = write_vhdl and write_verilog output netlists false = write_vhdl and write_verilog do not run
xilinx_configuration_visible/ xilinx-specific	N/A	true = LUT contents visible. false = LUT contents NOT visible.	true = LUT contents visible. false = LUT contents NOT visible.
xilinx_enable_modification/ xilinx-specific	N/A	true = Netlist modifications are allowed false = Netlist modifications are not allowed	true = Netlist modifications are allowed false = Netlist modifications are not allowed
xilinx_enable_probing/xilinx-specific	N/A	true = Allow customer to insert Analyzer probes into encrypted module/entity. false = Analyzer probes should not be inserted.	true = Analyzer probes might be inserted into encrypted module/entity. false = Analyzer probes should not be inserted.
xilinx_enable_bitstream/ xilinx-specific	N/A	N/A	true = Grant right to generate bitstream. false = Do not generate bitstream.
NA = Has no effect on the Vivado tool.