Power Delivery to the FPGA

Power needs must be assessed early in the design phase to assure that there are enough layers and area to provide sufficient power to the BGA balls that require power. Because most of the BGA power pins are located in the center of the BGA area, the path the current travels traverses a myriad of vias in the BGA area. The space between vias can conservatively carry about 0.05A per mil of trace width (for 0.5 oz copper). The trace width between vias is defined by the pitch of the vias (usually the same as the pitch of the BGA), the via drill diameter, and drill-to-copper specification as defined by the fabrication house. The following figure shows how to calculate the amount of current that can pass through each via channel. Ensure that the power planes are wide enough and encompassing enough to supply the needed amperage to the BGA power balls. The following equation can be used to calculate the current per channel:

Figure 1. Power Delivery within BGA Area (0.5 oz Copper)

The following table shows current per channel values for 0.8 mm and 1.0 mm pitch devices. Because of the very fine pitch of 0.5 mm devices, it is not possible to route in-between standard vias. Micro-vias under the BGA pads are recommended for 0.5 mm devices in order to reach the power planes

Table 1. Current Per Channel Calculation for 0.8 mm, 0.92 mm, and 1.0 mm Devices
	0.8 mm Pitch	0.92 mm Pitch	1.0 mm Pitch
Via Pitch	31.40 mil	36.22 mil	39.37 mil
Via Drill Diameter	10 mil	10 mil	10 mil
Drill to Copper Specification¹	8 mil	8 mil	8 mil
Amps per Unit Trace Width (ATW), 0.5 oz Cu	0.05 A	0.05 A	0.05 A
Amps per Unit Trace Width (ATW), 1.0 oz Cu	0.075 A	0.075 A	0.075 A
Current per Channel, 0.5 oz Cu	0.27 A	0.51 A	0.67 A
Current per Channel, 1.0 oz Cu	0.41 A	0.77 A	1.00 A
Drill-to-Copper of 8 mils is considered standard. Between 6.5 and 8 mil are considered advanced processes.