HPIO signals can be implemented as high-speed differential signaling such as MIPI interfaces or other application specific interfaces.
- HPIO P/N pairs should be routed as standard 50Ω single-ended traces.
- The maximum data rate supported on HPIO signals is 2.5 Gb/s. See Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics (DS925) for more information on HPIO signals.
- Implement length matching as required by the interface used on individual HPIO signal groups.
- Match P and N signals within an HPIO differential pair to within ±0.5 mils of each other.
- If using MIPI differential signals, length match the MIPI interface HPIO signal groups (pair to pair) within ±50 mils.
- MIPI differential signals to all other signal spacing should be 2.5 times the distance between signal to nearest GND plane.
- Match other application-specific HPIO use cases per the HPIO signal group interface requirement.