enable_component_id_0 (PL390) Register Description
| Register Name | enable_component_id_0 |
|---|---|
| Offset Address | 0x0000000FF0 |
| Absolute Address | 0x00F9000FF0 (RCPU_GIC) |
| Width | 8 |
| Type | roRead-only |
| Reset Value | 0x0000000D |
| Description | The component_id_[3:0] Registers are four eight-bit wide registers, that can conceptually be treated as a single register that holds a 32-bit PrimeCell ID value. |
enable_component_id_0 (PL390) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| component_id_0 | 7:0 | roRead-only | 0xD | These bits read back as 0x0D. |