cur_pwr_st (USB3_REGS) Register Description
| Register Name | cur_pwr_st |
|---|---|
| Offset Address | 0x0000000000 |
| Absolute Address |
0x00FF9D0000 (USB3_0) 0x00FF9E0000 (USB3_1) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Indicates current power state of the core |
cur_pwr_st (USB3_REGS) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:4 | razRead as zero | 0x0 | Reserved for future use |
| u2pmu | 3:2 | roRead-only | 0x0 | A value of 2b11 indicates core in U3 state while 2b00 indicates U0 power state |
| u3pmu | 1:0 | roRead-only | 0x0 | A value of 2b11 indicates core in U3 state while 2b00 indicates U0 power state |