control_n_int_ack_n (PL390) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

control_n_int_ack_n (PL390) Register Description

Register Namecontrol_n_int_ack_n
Offset Address0x000000100C
Absolute Address 0x00F900100C (RCPU_GIC)
Width32
TyperoRead-only
Reset Value0x000003FF
DescriptionInterrupt Acknowledge Register (ICCIAR)

control_n_int_ack_n (PL390) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0roRead-only0x3FFRefer to the Arm Generic Interrupt Controller Architecture Specification 2.0 for a detailed register descriptions.