ZQ1OR1 (DDR_PHY) Register Description
| Register Name | ZQ1OR1 |
|---|---|
| Offset Address | 0x00000006B8 |
| Absolute Address | 0x00FD0806B8 (DDR_PHY) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | ZQ 1 Impedance Control Override Data Register 1 |
ZQ1OR1 (DDR_PHY) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:26 | roRead-only | 0x0 | Reserved. Return zeros on reads. |
| ZDATA_PU_ODT_OVRD | 25:16 | rwNormal read/write | 0x0 | Override value for the pull-up output impedance and is controlled by ZQ1PR0.DRV_PU_ZDEN |
| Reserved | 15:10 | roRead-only | 0x0 | Reserved. Return zeros on reads. |
| ZDATA_PD_ODT_OVRD | 9:0 | rwNormal read/write | 0x0 | Override value for the pull-down output impedance and is controlled by ZQ1PR0.DRV_PD_ZDEN |