Status_Reg (I2C) Register Description
| Register Name | Status_Reg |
|---|---|
| Offset Address | 0x0000000004 |
| Absolute Address |
0x00FF020004 (I2C0) 0x00FF030004 (I2C1) |
| Width | 16 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | Status register |
Status_Reg (I2C) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 15:9 | roRead-only | 0x0 | Reserved, read as zero, ignored on write. |
| BA | 8 | roRead-only | 0x0 | Bus Active 1 - ongoing transfer on the I2C bus. |
| RXOVF | 7 | roRead-only | 0x0 | Receiver Overflow 1 - This bit is set whenever FIFO is full and a new byte is received. The new byte is not acknowledged and contents of the FIFO remains unchanged. |
| TXDV | 6 | roRead-only | 0x0 | Transmit Data Valid - SW should not use this to determine data completion, it is the RAW value on the interface. Please use COMP in the ISR. 1 - still a byte of data to be transmitted by the interface. |
| RXDV | 5 | roRead-only | 0x0 | Receiver Data Valid 1 -valid, new data to be read from the interface. |
| Reserved | 4 | roRead-only | 0x0 | Reserved, read as zero, ignored on write. |
| RXRW | 3 | roRead-only | 0x0 | RX read_write 1 - mode of the transmission received from a master. |
| Reserved | 2:0 | roRead-only | 0x0 | Reserved, read as zero, ignored on write. |