SMMU_CB11_FAR_low (SMMU500) Register Description
| Register Name | SMMU_CB11_FAR_low |
|---|---|
| Offset Address | 0x000001B060 |
| Absolute Address | 0x00FD81B060 (SMMU_GPV) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Holds the Lower input address bits [31:0] of the memory access that caused a synchronous abort exception. |
SMMU_CB11_FAR_low (SMMU500) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| bits | 31:0 | rwNormal read/write | 0 | Refer to Arm SMMU v2 Architecture Spec (Arm IHI0062B) for more details |