ROM_VALIDATION_DIGEST_0 (PMU_GLOBAL) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ROM_VALIDATION_DIGEST_0 (PMU_GLOBAL) Register Description

Register NameROM_VALIDATION_DIGEST_0
Offset Address0x0000000614
Absolute Address 0x00FFD80614 (PMU_GLOBAL)
Width32
TyperoRead-only
Reset Value0xFFFFFFFF
DescriptionPMU ROM Validation SHA value, Word 0.

Once the ROM has been validated, the resulting SHA value (384 bits) is stored in the ROM_VALIDATION_DIGEST_{0:11} registers. Note: the order of these 12 registers is not the same as those for the CSU ROM validation SHA values.

ROM_VALIDATION_DIGEST_0 (PMU_GLOBAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Word31:0roRead-only0xFFFFFFFFBits [31:0] correspond to SHA [31:0].