PxCLB (SATA_AHCI_PORTCNTRL) Register Description
| Register Name | PxCLB |
|---|---|
| Offset Address | 0x0000000000 |
| Absolute Address |
0x00FD0C0100 (SATA_AHCI_PORT0_CNTRL) 0x00FD0C0180 (SATA_AHCI_PORT1_CNTRL) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Port x Command List Base Address (PxCLB) |
PxCLB (SATA_AHCI_PORTCNTRL) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| CLB | 31:10 | rwNormal read/write | 0x0 | Command List Base Address (CLB): Indicates the 32-bit base physical address for the command list for this port. This base is used when fetching commands to execute. The structure pointed to by this address range is 1K-bytes in length. This address must be 1K-byte aligned as indicated by bits 09:00 being read only. |
| Reserved | 9:0 | roRead-only | 0x0 | Reserved |