PP0_REND_LIST_ADDR (GPU) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

PP0_REND_LIST_ADDR (GPU) Register Description

Register NamePP0_REND_LIST_ADDR
Offset Address0x0000008000
Absolute Address 0x00FD4B8000 (GPU)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionRenderer List Address Register

PP0_REND_LIST_ADDR (GPU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
REND_LIST_ADDR31:3rwNormal read/write0x0Start address of the polygon list to use for the frame
Reserved 2:0rwNormal read/write0x0Reserved, write as zero, read undefined