PIDR0 (TSGEN) Register Description
| Register Name | PIDR0 |
|---|---|
| Offset Address | 0x0000000FE0 |
| Absolute Address | 0x00FE900FE0 (CORESIGHT_SOC_TSGEN) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000001 |
| Description | Part of the set of Peripheral Identification registers. Contains part of the designer specific part number. |
PIDR0 (TSGEN) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| PART_0 | 7:0 | roRead-only | 0x1 | Bits [7:0] of the component part number. This is selected by the designer of the component. |