OEN_5 (GPIO) Register Description
| Register Name | OEN_5 |
|---|---|
| Offset Address | 0x0000000348 |
| Absolute Address | 0x00FF0A0348 (GPIO) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Output enable (GPIO Bank5, EMIO Bank2) |
This register operates in exactly the same manner as OEN_0, except that it reflects bank5, which corresponds to EMIO[95:64].
OEN_5 (GPIO) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| OP_ENABLE_5 | 31:0 | rwNormal read/write | 0x0 | Output enables 0: disabled 1: enabled Each bit configures the corresponding pin within the 26-bit bank |