Modem_ctrl (UART) Register Description
| Register Name | Modem_ctrl |
|---|---|
| Offset Address | 0x0000000024 |
| Absolute Address |
0x00FF000024 (UART0) 0x00FF010024 (UART1) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Modem Control Register |
The read/write Modem Control register controls the interface with the modem or data set, or a peripheral device emulating a modem.
Modem_ctrl (UART) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:6 | roRead-only | 0x0 | Reserved, read as zero, ignored on write. |
| FCM | 5 | rwNormal read/write | 0x0 | Automatic flow control mode: 0: disable Transmission is continuous regardless of the value of the EMIOUARTxCTSN input, and the EMIOUARTxRTSN output is driven completely under software control. 1: enable Transmission will only occur when the EMIOUARTxCTSN input is asserted low, and the EMIOUARTxRTSN output is driven using a compare of the RX FIFO fill level to the programmed FDEL value. |
| Reserved | 4:2 | roRead-only | 0x0 | Reserved, read as zero, ignored on write. |
| RTS | 1 | rwNormal read/write | 0x0 | Request to send output control: This bit is ignored if automatic flow control mode is enabled by FCM being high. If FCM is low, the value of this bit is inverted when applied to the EMIOUARTxRTSN output. 0: EMIOUARTxRTSN output forced to logic 1 1: EMIOUARTxRTSN output forced to logic 0 |
| DTR | 0 | rwNormal read/write | 0x0 | Data Terminal Ready: The value of this bit is inverted when applied to the EMIOUARTxDTRN output. 0: EMIOUARTxDTRN output forced to logic 1 1: EMIOUARTxDTRN output forced to logic 0 |