DP_MAIN_STREAM_VSTART (DISPLAY_PORT) Register Description
| Register Name | DP_MAIN_STREAM_VSTART |
|---|---|
| Offset Address | 0x00000001A0 |
| Absolute Address | 0x00FD4A01A0 (DISPLAY_PORT) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Number of lines between the leading edge of the vertical sync and the first line of active data. |
DP_MAIN_STREAM_VSTART (DISPLAY_PORT) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:16 | razRead as zero | 0x0 | |
| VSTART | 15:0 | rwNormal read/write | 0x0 | Vertical start line count. |