| Field Name | Bits | Type | Reset Value | Description |
|---|
| VSYNC_TS | 31 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| EXT_VSYNC_TS | 30 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CUST_TS | 29 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CUST_TS_2 | 28 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CHBUF0_OVERFLW | 27 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CHBUF1_OVERFLW | 26 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CHBUF2_OVERFLW | 25 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CHBUF3_OVERFLW | 24 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CHBUF4_OVERFLW | 23 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CHBUF5_OVERFLW | 22 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CHBUF0_UNDERFLW | 21 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CHBUF1_UNDERFLW | 20 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CHBUF2_UNDERFLW | 19 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CHBUF3_UNDERFLW | 18 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CHBUF4_UNDERFLW | 17 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| CHBUF5_UNDERFLW | 16 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| PIXEL0_MATCH | 15 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| PIXEL1_MATCH | 14 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| VBLNK_START | 13 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| LIV_AUDBUF_UNDRFLW | 12 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| Reserved | 11:6 | razRead as zero | 0x0 | |
| EXT_PKT_TXD | 5 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| HPD_PULSE_DET | 4 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| REPLY_TIMEOUT | 3 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| REPLY_RECEIVED | 2 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| HPD_EVENT | 1 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |
| HPD_IRQ | 0 | woWrite-only | 0x0 | See DP_INT_STATUS register for description |