DATA_1_RO (GPIO) Register Description
| Register Name | DATA_1_RO |
|---|
| Offset Address | 0x0000000064 |
|---|
| Absolute Address |
0x00FF0A0064 (GPIO)
|
|---|
| Width | 32 |
|---|
| Type | mixedMixed types. See bit-field details. |
|---|
| Reset Value | 0x00000000 |
|---|
| Description | Input Data (GPIO Bank1, MIO) |
|---|
This register operates in exactly the same manner as DATA_0_RO, except that it reflects bank1, which corresponds to MIO[51:26].
DATA_1_RO (GPIO) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| Reserved | 31:26 | razRead as zero | 0x0 | Not used, read back as zero |
| DATA_1_RO | 25:0 | roRead-only | 0 | Input Data |