CSUDMA_DST_ADDR_MSB (CSUDMA) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

CSUDMA_DST_ADDR_MSB (CSUDMA) Register Description

Register NameCSUDMA_DST_ADDR_MSB
Offset Address0x0000000828
Absolute Address 0x00FFC80828 (CSUDMA)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionDestination mem address (msbs) for DMA stream->memory data transfer

CSUDMA_DST_ADDR_MSB (CSUDMA) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:17razRead as zero0x0RESERVED. Return 0 when read. Writes ignored.
ADDR_MSB16:0rwNormal read/write0x0Destination memory address (msbs) for DMA stream to memory data transfer
Refer to the description for CSUDMA_DST_ADDR for full details. This field is the 17 msbs of the full 49-bit DST address
The full 49-bit destination address is comprised of this field concatenated with the CSUDMA_DST_ADDR field as follows:
49-bit DST address = {ADDR_MSB, CSU_DMA_DST_ADDR.ADDR, 2b00}