AXIPC (SATA_AHCI_VENDOR) Register Description
| Register Name | AXIPC |
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| Offset Address | 0x0000000024 |
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| Absolute Address |
0x00FD0C00C4 (SATA_AHCI_VENDOR)
|
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| Width | 32 |
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| Type | mixedMixed types. See bit-field details. |
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| Reset Value | 0x00000000 |
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| Description | AXI PROT Control. |
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Controls the value of the AWPROT and ARPROT used to distinguish each address operation on the address bus.
AXIPC (SATA_AHCI_VENDOR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| Reserved | 31:30 | roRead-only | 0x0 | Reserved |
| EARP | 29 | rwNormal read/write | 0x0 | Enable the ARPROT (EARP): control from the PRDT entries used during the data phase of this operation |
| EAWP | 28 | rwNormal read/write | 0x0 | Enable the AWPROT (EAWP): control from the PRDT entries used during the data phase of this operation |
| Reserved | 27 | roRead-only | 0x0 | Reserved |
| AWPF | 26:24 | rwNormal read/write | 0x0 | Address Write Prot FIS (AWPF): This is the value driven onto AWPROT when the AXI master is posting a status FIS write address to the memory controller. |
| Reserved | 23 | roRead-only | 0x0 | Reserved |
| AWPD | 22:20 | rwNormal read/write | 0x0 | Address Write Prot Data (AWPD): This is the value driven onto AWPROT when the AXI master is posting a Data burst write address to the memory controller when the data burst is not the final burst in the transfer. |
| Reserved | 19 | roRead-only | 0x0 | Reserved |
| AWPFD | 18:16 | rwNormal read/write | 0x0 | Address Write Prot Final Data (AWPFD): This is the value driven onto AWPROT when the AXI master is posting a Data burst write address to the memory controller when the data burst is the final burst in the transfer. |
| Reserved | 15 | roRead-only | 0x0 | Reserved |
| ARPP | 14:12 | rwNormal read/write | 0x0 | Address Read Prot PRD (ARPP): This is the value driven onto ARPROT when the AXI master is posting a PRD read address to the memory controller. |
| Reserved | 11 | roRead-only | 0x0 | Reserved |
| ARPH | 10:8 | rwNormal read/write | 0x0 | Address Read Prot Header (ARPH): This is the value driven onto ARPROT when the AXI master is posting a Header read address to the memory controller. |
| Reserved | 7 | roRead-only | 0x0 | Reserved |
| ARPF | 6:4 | rwNormal read/write | 0x0 | Address Read Prot FIS (ARPF): This is the value driven onto ARPROT when the AXI master is posting a command FIS read address to the memory controller. |
| Reserved | 3 | roRead-only | 0x0 | Reserved |
| ARPD | 2:0 | rwNormal read/write | 0x0 | Address Read Prot Data (ARPD): This is the value driven onto ARPROT when the AXI master is posting a data burst read address to the memory controller. |