ATTR_6 (PCIE_ATTRIB) Register Description
| Register Name | ATTR_6 |
|---|---|
| Offset Address | 0x0000000018 |
| Absolute Address | 0x00FD480018 (PCIE_ATTRIB) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000007 |
| Description | ATTR_6 |
This register should only be written to during reset of the PCIe block
ATTR_6 (PCIE_ATTRIB) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr_aer_cap_multiheader | 8 | rwNormal read/write | 0x0 | Drives value on AER Capabilities[9]. Will cause core to buffer several headers for AER header log field. |
| attr_aer_cap_optional_err_support | 7:0 | rwNormal read/write | 0x7 | Indicates which optional error conditions in the Uncorrectable and Correctable Error Mask/Severity registers are supported. If an error is unsupported, then the corresponding bit in the Mask/Severity register is hardwired to 0. Encoding ("1" indicates support): [0] : MC Blocked TLP [1] : AtomicOp Egress Blocked [2] : TLP Prefix Blocked [7:3] : undefined |