ATTR_103 (PCIE_ATTRIB) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ATTR_103 (PCIE_ATTRIB) Register Description

Register NameATTR_103
Offset Address0x000000019C
Absolute Address 0x00FD48019C (PCIE_ATTRIB)
Width32
TyperwNormal read/write
Reset Value0x00000022
DescriptionATTR_103

This register should only be written to during reset of the PCIe block

ATTR_103 (PCIE_ATTRIB) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr_vc0_cpl_infinite 5rwNormal read/write0x1The block will advertise infinite completions. This must be set to 1. Setting this field to 0 (finite completion credits) is not supported for EP and Root configurations
attr_vc_cap_version 4:1rwNormal read/write0x1The version of Virtual Channel Capability followed. The value is transferred to the VC Capabilities Register[19:16]
attr_tl_tx_ram_write_latency 0rwNormal read/write0x0No impact - this attribute is unused in the block