ADDR_ERROR_INT_MASK (PMU_LOCAL) Register - UG1087

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

ADDR_ERROR_INT_MASK (PMU_LOCAL) Register Description

Register NameADDR_ERROR_INT_MASK
Offset Address0x0000000324
Absolute Address 0x00FFD60324 (PMU_LOCAL)
Width 1
TyperoRead-only
Reset Value0x00000001
DescriptionAddress Error Decode Interrupt Mask.

Address Error Mask Register. This is a read-only location and can be altered through the corresponding Interrupt Enable or Disable registers.

ADDR_ERROR_INT_MASK (PMU_LOCAL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Mask 0roRead-only0x1Mask for an address decode error interrupt.