Handling Large Designs - 2025.2 English - UG1076

AI Engine Tools and Flows User Guide (UG1076)

Document ID
UG1076
Release Date
2025-11-20
Version
2025.2 English

The AI Engine compiler attempts to find suitable placement in the AI Engine array. For larger AI Engine designs, placement can be challenging. Suggestions for the AI Engine compiler to handle such large designs are as follows:

  • When mapping large designs, consider the following physical resources of the target device:
    • The number of AI Engine cores
    • The size of buffers allocated
    • The broadcast or merge points that can lead to congestion
  • AI Engine design development can start by targeting a subset of the AI Engine arrays. After this, you can expand development to all AI Engine arrays.
  • You can divide the full design into smaller sub-blocks, then constrain each to specific areas using location constraints.
  • Relative constraints can be used to provide guidance while maintaining flexibility about the exact position. When there are multiple instances of the same sub-graph in the AI Engine design, use the Stamp and Repeat constraints. Using Stamp and Repeat constraints ensures identical sub-graph placement and helps provide more deterministic AI Engine compiler behavior and performance.
  • Two optional mapper arguments (Xmapper) can be used individually or together to provide a more compact placement:
    enableUtilOpt
    Controls the partitioner's target utilization, influencing how tightly the design is packed. This helps minimize fragmentation and boost packing efficiency, particularly in designs with limited tile resources.
    --Xmapper=enableUtilOpt
    enableColumnUtilOpt
    Biases placement toward columnar spread. Reduces routing complexity and improves performance in column-based architecture.
    --Xmapper=enableColumnUtilOpt

These suggestions help reduce the search space problem for the AI Engine compiler, resulting in better placement convergence.