For larger AI Engine designs the placement stage of the AI Engine compiler where it attempts to find suitable placement in the AI Engine array can be challenging and time consuming. Suggestions for the AI Engine compiler to handle such large designs are as follows:
- When mapping large designs, keep the physical resources of the target device in mind, such as, the number of AI Engine cores, the size of buffers allocated, and the broadcast or merge points that can lead to congestion.
- AI Engine design development can start by targeting a subset of the AI Engine arrays. Then, development can be expanded to all AI Engine arrays.
- The full design can be divided into smaller sub-blocks, each of which can be constrained to specific areas using location constraints.
- Relative constraints can be used to provide guidance while
maintaining flexibility about the exact position. When there are multiple instances
of the same sub-graph in the AI Engine
design, use the
StampandRepeatconstraints to ensure more identical sub-graph placement. This also helps provide more deterministic AI Engine compiler behavior and performance.
These suggestions help reduce the search space problem for the AI Engine compiler, resulting in better placement convergence.