Event Trace Routing - 2025.2 English - UG1076

Enabling the event trace feature on designs can impact the routing of the AI Engine application. Collecting event information and passing it outside the AI Engine block requires extra resources. The routing phase occurs in two steps:

1. Routing Data-flow nets.
2. Routing Event trace signals among the remaining unused paths.

When all trace nets cannot be routed for a design with event trace enabled, the default behavior is as follows:

1. The AI Engine compiler issues a critical warning to indicate it cannot route all requested event trace signals.
2. The AI Engine compiler errors out.

The following example shows a Critical Warning which indicates the trace nets that failed to route.

CRITICAL WARNING: [aiecompiler 35-4476] Trace Net tr_net352 driven by AIE_ML_MEM_TILE_X9Y2/AIE_MEMGRP_M_TRACE_PIN failed to route. Design will not pass post route drc check.
CRITICAL WARNING: [aiecompiler 35-4476] Trace Net tr_net306 driven by AIE_ML_MEM_TILE_X9Y3/AIE_MEMGRP_M_TRACE_PIN failed to route. Design will not pass post route drc check.

To successfully route as many event trace nets as possible, AMD recommends using the option Xrouter=skipunroutabletracenets. Using this, the AI Engine compiler does not error out. It continues to route trace nets where possible. The compiler returns a critical warning for every trace net that it cannot route.