Compiling and Linking Host Code for Bare-Metal - 2025.2 English - UG1076

AI Engine Tools and Flows User Guide (UG1076)

Document ID
UG1076
Release Date
2025-11-20
Version
2025.2 English

To build the PS application for the bare-metal flow, use the Vitisplatform generated in the previous step

To do this, you need the PS application (main.cpp), and the bare-metal AI Engine control file (aie_control.cpp). The ./Work/ps/c_rts folder contains the control file created by the AI Engine compiler.

You can set up the PS application with the Vitis IDE. See this link for details. For bare-metal, in the Symbols section under Compiler Settings, add __PS_BARE_METAL__. When creating a Vitis application, a linker script lscript.ld is generated in the src folder. To set stack and heap size, open or double click on lscript.ld for the project. Use 0x10000 (1 MB) heap size as the starting size.

Note: The required heap size depends on the application. If the compiler fails, try increasing the heap size.

Compile the main.cpp file using the following command:

aarch64-none-elf-gcc \
-I<path_to_app_source> \
-I<path_to_aie_source> \
-I<path_to_bsp>/include \
-D__PS_BARE_METAL__ \
-g -c -std=c++17 -o main.o main.cpp
Note: You must include the BSP files for the generated custom-base platform, located at: <vitis_workspace>/<vitis_pfm_name>/export/<vitis_pfm_name>/sw/standalone/include

where, vitis_pfm_name is the user-defined Vitis platform name.

Compile the aie_control.cpp file using the following command:

aarch64-none-elf-gcc \
-I<path_to_app_source> \
-I<path_to_aie_source> \
-I<path_to_aie_control_app_source> \-I<path_to_bsp>/include \
-D__PS_BARE_METAL__ \
-g -c -std=c++17 -o aie_control.o ../Work/ps/c_rts/aie_control.cpp

Link the PS application using the two compiled object files:

aarch64-none-elf-gcc main.o aie_control.o -g -mcpu=<target_cpu> -Wl,-T -Wl,./lscript.ld \-L<path_to_bsp>/lib  \
-D__PS_BARE_METAL__ \
-ladf_api -Wl,--start-group,-lxil,-lgcc,-lc,-lstdc++,--end-group -o main.elf
Note: The target_cpu option is cortex_a72 or cortex_r5 for Versal/Versal-ML devices, and cortex_a78 or cortex_r53for Versal-ML v2 devices.
Note: You also need the BSP libxil.a located at <vitis_workspace>/<vitis_pfm_name>/export/<vitis_pfm_name>/sw/standalone/lib during linking. This assumes the AI Engine is enabled during the Platform Management Controller (PMC) boot.
Note: You can obtain the linker script lscript.ld from the Vitis IDE. See Creating a Bare-Metal System in Vitis Reference Guide (UG1702) for details. See A to Z Bare-metal Flow in the AMD GitHub AI Engine Vitis Tutorials for further details.
Note: Graph or kernel code designed for multiple architectures must use the __AIE_ARCH__ macro. This guards architecture-specific code. You must define the macro in the host compilation. For example, add -D__AIE_ARCH__=10 for host compilation for AI Engine devices, and -D__AIE_ARCH__=20 for AI Engine-ML devices.
Important: The steps to integrate the host code with the AI Engine graph application and the PL kernels into the hardware platform requires running the v++ --package command. You can build and run the Versal device system using the Vitis tool flow. See Building and Running the System in the Data Center Acceleration using Vitis (UG1700) .