Checking Mapping Results - 2025.2 English - UG1076

AI Engine Tools and Flows User Guide (UG1076)

Document ID
UG1076
Release Date
2025-11-20
Version
2025.2 English
Check PLIO placement to see if it is causing routing congestion. The most common congestion area for router is in the interface tile region. There are more PLIO channels than there are Interface Channels to connect them into the AI Engine array.
  1. If constraining PLIOs, ensure adequate resources into the AI Engine array are open to handle the locked PLIOs.
  2. If possible, limit PLIO placement near shadow regions to decrease congestion of routing resources.
  3. Check PLIO placement/constraints to verify that crossing (as shown in the following figure) is not occurring.