- Integrated DDRMC through NoC
- Soft memory controllers
- XP5IO wizard
- I/O logic
This tool only allows for nibble and bank level granularity. If more granularity is required, use the classic pin planning tools. If the XP5IO Wizard IP exists in the design, the banners of both tabs contain a message and a button to launch the Advanced I/O Planner. The Advanced I/O Planner understands any interface in the XP5IO I/O block. If there is a hard memory controller, this also appears in the Advanced I/O Planner. The placement of these interfaces is arranged as optimal as possible based on a centralized hardware rule based engine. There is a priority to this list, such as hard memory controller, soft memory controller.
- To invoke the pin planner, open the synthesize Design, and select
Open Advanced I/O Planner in the I/O Ports tab:
- In the example design, each of the 48 pin interfaces can be placed with a
single bank. In this example, Bank 85 is used for the RX interface. Selecting
the Auto Assign automatically place all cores.
To restart pin placement, click the Unplace Ports for Instances button.
- To select specific octads, use the Nibble Groups tab. In the Signal Groups
column, click the selection button on the right. Selecting a given octad group
moves the octad to a given location.
The pin planner provides:
- Collapsible Device Resource Tree
- Device resources, such as banks, nibble groups, appear in a collapsible tree that varies depending on the selected device.
- DRC Information
- At the top of the Advanced I/O Planner, a DRC status message provide information about the DRC violations with a link to more information, errors and warning.