Side-by-Side Comparison - Side-by-Side Comparison - 1.0 English - PG456

Integrated DDR5/LPDDR5/5X Memory Controller LogiCORE IP Product Guide (PG456)

Document_ID
PG456
Release_Date
2026-08-07
Version
1.0 English
Table 1. Normal versus Flipped
  Normal (DDRMC0) Flipped (DDRMC1)
First bank (lowest number) M0P0-31, Half Bank H0 M1P64-95, Half Bank H1
Second bank M0P32-63, Half Bank H1 M1P32-63, Half Bank H0
Third bank (highest number) M0P64-95, Half Bank H0 M1P0-31, Half Bank H1
Important: The same signal (for example, dq[0]) always maps to the **same M\*P\* position** on both Normal and Flipped DDRMCs. The difference is which physical bank that M*P* position falls in.

Adjacent DDRMCs in the device alternate between Normal and Flipped bank mappings.

Figure 1. Normal versus Flipped DDRMC5 Orientation