In a Normal DDRMC (for example, DDRMC0 on banks 700-702):
- Bank 700 contains the lowest controller pins (M0P0-M0P31)
- Bank 701 contains the middle pins (M0P32-M0P63)
- Bank 702 contains the highest pins (M0P64-M0P95)
The banks read from low to high, as expected.